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Developing reusable and reconfigurable real-time software using aspects and components by Tešanović, Aleksandra 1976-

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Published by Univ. in Linköping .
Written in English


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Book details:

Edition Notes

Diss. Linköping : Linköpings universitet, 2006.

Statementby Aleksandra Tešanović
SeriesLinköping studies in science and technology. Dissertation -- 1005, Linköping studies in science and technology -- 1005.
The Physical Object
Paginationxix, 237 s.
Number of Pages237
ID Numbers
Open LibraryOL27030845M
ISBN 109185497290
ISBN 109789185497294

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The above framework has been used to systematically define a hierarchy of reusable and reconfigurable components – simple and composite function blocks, reconfigurable state machines and function units – implementing the executable models presented in the by: Alonso A, de la Puente J and Tindell K Components for the implementation of fixed priority real-time systems in ADA Proceedings of the eighth international workshop on Real-Time Ada, () de Bondeli P Developing reusable multi-tasking components using object-oriented techniques in Ada 95 Proceedings of the eighth international workshop on. Furthermore, a family of real-time systems can easily be developed by adding aspects from the QoS aspect package into an existing system configuration. We illustrate the way a family of real-time database systems is developed using the QoS aspect package with a case study of an embedded real-time database system, called by: 4. Tešanović A, Nyström D, Hansson J and Norström C () Aspects and components in real-time system development: Towards reconfigurable and reusable software, Journal of Embedded Computing, , (), Online publication date: 1-Jan

The shortcomings of layered software drive a desire for highly optimized reusable software components. This chapter introduces the component factory concept: a mechanism that creates reconfigurable and reusable hardware- and RTOS-agnostic components generated by an expert system. we cover the aspects of developing safety-critical software. The Chimera Methodology: Designing Dynamically Reconfigurable and Reusable Real-Time Software using Port-Based Objects; David B. Stewart and Pradeep K. Khosla International Journal of Software Engineering and Knowledge Engineering, vol 6, no. 2, June , pp. Gesture-Based Programming, Part 1: A Multi-Agent Approach; R.M. Voyles and P. In order to provide dynamic and ad hoc services in Pervasive computing environment it is important to consider developing reusable software components. Different architectures such as Product-line architectures are being used to assist in reusing the software components across . A. Tesanovic, J. Hansson, D. Nyström, C. Norström, and P. Uhlin, Aspect-Level WCET Analyzer: a Tool for Automated WCET Analysis of a Real-Time Software Composed Using Aspects and Components, in Proceedings of the 3rd International Workshop on Worst-Case Execution Time Analysis (WCET ), (Porto, Portugal), July Available as PDF.

Nowadays embedded and real-time systems contain complex software. The complexity of embedded systems is increasing, and the amount and variety of software in the embedded products are growing. This creates a big challenge for embedded and real-time software development processes and there is a need to develop separate metrics and benchmarks. 5. The Reflector, February The Institute of Electrical and Electronic Engineers, Inc. Spring Professional Development and Education Program Phased-Array and Adaptive. 3 Reusable Booster System Technology Assessment. The statement of task for this study (see Appendix A) specifically calls for addressing the technical maturity of the key elements critical to the reusable booster system (RBS) implementation and the ability of current technology development plans to meet technical readiness chapter identifies these key elements, addresses their. The goal of this book is to help designers become comfortable with these issues, and thus be able to exploit the vast opportunities possible with reconfigurable logic. Focuses on both hardware and software systems. Treats FPGAs as computing vehicles rather than glue-logic or ASIC substitutes. Assembles broad set of models for exploiting FPGA.